Portrait of Paul Merolla

Paul Merolla

I build more intelligent computers, drawing on neuroscience, chip design, and machine learning.

I co-founded MK1 in 2023 to make AI inference fast, efficient, and generally useful. Our Flywheel engine grew to serve over a trillion tokens a day, and in 2025 MK1 was acquired by AMD, where our team now works in the Artificial Intelligence Group.

Before that, I was on the founding team at Neuralink, where I co-led chip design and developed the algorithms that decode brain activity. Earlier in my career, I designed brain-inspired chips at IBM and Stanford.

News

Illustration of the MK1 Flywheel inference engine

MK1 joins AMD

When we started MK1 in early 2023, ChatGPT had just launched and there was an obvious gap between what AI could theoretically do and what it could reliably deliver in the real world. Our vision was simple: build foundational technology to make AI fast, efficient, and generally useful.

We delivered. Our Flywheel inference engine now serves over a trillion tokens a day, and our Comprehension Engine gives LLMs a scalable reasoning and memory layer for coding applications and complex enterprise workflows.

I'm excited that MK1 is joining AMD, in Anush Elangovan's organization. Joining AMD is the right next step for our technology and our mission: we'll have the resources and platform to reach the scale we always envisioned, while our team continues building what we started. I'm deeply grateful to our backers, our customers, and especially the MK1 team, whose talent and execution turned our vision into reality.

Exploded view of the Neuralink implant

Off to a new adventure

After five and a half years, I decided to leave Neuralink to pursue another project. It was a difficult decision: I still find Neuralink's mission extremely compelling, and I was having a lot of fun developing algorithms to decode brain activity. What I'll miss most is working with the incredibly talented and passionate team. I look forward to seeing our work improve the lives of patients who suffer from brain injury.

Figure from the PNAS paper on convolutional networks for neuromorphic hardware

Convolutional networks for energy-efficient neuromorphic computing

Our PNAS paper asks how deep learning can work within the constraints of low-power neural hardware. We describe a modified backpropagation that reaches near state-of-the-art accuracy with discrete synapses, limited-precision communication, and restricted connectivity, running live on TrueNorth across eight datasets at 1,200–2,600 frames per second while using only 25–275 mW.

Cover of Science, August 2014, featuring the TrueNorth chip

TrueNorth on the cover of Science

TrueNorth's architecture is inspired by the structure and function of the brain: a 64×64 array of neurosynaptic cores, each combining neurons (computation), synapses (memory), and a spike router (communication). With 5.4 billion transistors, it has one million neurons and 256 million synapses, runs in real time, and consumes less than 100 mW. I was one of the lead chip architects.

Read the Science article or the pre-print (PDF).

Photograph of a Neurocore chip

Neurogrid in Proceedings of the IEEE

Neurogrid is an analog neuromorphic supercomputer made of sixteen Neurocore chips (pictured) connected in a tree. I co-led the design with John Arthur, Rodrigo Alvarez, and Kwabena Boahen.

Experience

  1. 2025 –
    AMD, Artificial Intelligence Group

    High-speed inference and enterprise AI on AMD Instinct GPUs.

  2. 2023 – 2025
    Co-founder, MK1

    Built the Flywheel inference engine (over a trillion tokens a day) and the Comprehension Engine, a reasoning and memory layer for LLMs. Acquired by AMD.

  3. 2017 – 2022
    Founding team, Neuralink

    High-bandwidth brain–machine interfaces; algorithms for decoding brain activity.

  4. 2010 – 2016
    Research scientist, IBM Brain-Inspired Computing

    Lead chip architect on TrueNorth, part of the DARPA SyNAPSE program.

  5. 2006 – 2010
    Postdoctoral scholar, Stanford Brains in Silicon

    Co-led design of Neurogrid, a sixteen-chip system emulating one million neurons in real time.

  6. 2006
    PhD, Bioengineering, University of Pennsylvania
  7. 2000
    BS, Electrical Engineering, University of Virginia

Interests

Publications

Full list on Google Scholar.

Journals

  1. 2016
    Convolutional networks for fast, energy-efficient neuromorphic computingEsser S, Merolla P, Arthur JV, et al.Proceedings of the National Academy of Sciences, 2016
  2. 2014
    A million spiking-neuron integrated circuit with a scalable communication network and interfaceMerolla P, Arthur JV, Alvarez-Icaza R, Cassidy A, Sawada J, Akopyan F, Jackson B, et al.Science, 345(6197):668–673, 2014 · Cover & feature story · PDF
    BibTeX
    @article{merolla2014Science,
      author  = {P.A. Merolla and J.V. Arthur and R. Alvarez-Icaza and A.S. Cassidy and J. Sawada and F. Akopyan and B.L. Jackson and N. Imam and C. Guo and Y. Nakamura and B. Brezzo and I. Vo and S.K. Esser and R. Appuswamy and B. Taba and A. Amir and M.D. Flickner and W.P. Risk and R. Manohar and D.S. Modha},
      title   = {A million spiking-neuron integrated circuit with a scalable communication network and interface},
      journal = {Science},
      year    = {2014},
      month   = {August}
    }
  3. 2014
    Neurogrid: A mixed-analog-digital multichip system for large-scale neural simulationsBenjamin BV, Gao P, McQuinn E, Choudhary S, Chandrasekaran A, Bussat JM, Alvarez R, Arthur JV, Merolla P, Boahen KProceedings of the IEEE, 102(5):699–716, 2014
    BibTeX
    @article{benjamin2014neurogrid,
      author       = {Benjamin, Ben Varkey and Gao, Peiran and McQuinn, Emmett and Choudhary, Swadesh and Chandrasekaran, Anand and Bussat, Jean-Marie and Alvarez-Icaza, Rodrigo and Arthur, John and Merolla, Paul and Boahen, Kwabena},
      title        = {Neurogrid: A mixed-analog-digital multichip system for large-scale neural simulations},
      journal      = {Proceedings of the IEEE},
      organization = {IEEE},
      year         = {2014},
      volume       = {102},
      number       = {5},
      pages        = {699--716}
    }
  4. 2014
    A multicast tree router for multichip neuromorphic systemsMerolla P, Arthur J, Alvarez R, Bussat JM, Boahen KIEEE Transactions on Circuits and Systems I, 61(3):820–833, 2014
    BibTeX
    @article{Merolla14TreeRouter,
      author       = {Merolla, Paul and Arthur, John and Alvarez, Rodrigo and Bussat, Jean-Marie and Boahen, Kwabena},
      title        = {A Multicast Tree Router for Multichip Neuromorphic Systems},
      journal      = {Circuits and Systems I: Regular Papers, IEEE Transactions on},
      organization = {IEEE},
      year         = {2014},
      month        = {March},
      volume       = {61},
      number       = {3},
      pages        = {820--833}
    }
  5. 2012
    Implementation of olfactory bulb glomerular-layer computations in a digital neurosynaptic coreImam N, Cleland T, Manohar R, Merolla P, Arthur J, Akopyan F, Modha DFrontiers in Neuromorphic Engineering, 2012
  6. 2007
    Expandable networks for neuromorphic chipsMerolla P, Arthur J, Shi B, Boahen KIEEE Transactions on Circuits and Systems I, 54(2):301–311, 2007
  7. 2005
    Neuromorphic implementation of orientation hypercolumnsChoi T, Merolla P, Arthur J, Boahen K, Shi BIEEE Transactions on Circuits and Systems I, 52(6):1049–1060, 2005

Conferences

  1. 2015
    Backpropagation for energy-efficient neuromorphic computingEsser S, Appuswamy R, Merolla P, Arthur JV, Modha DNeurIPS, 1117–1125, 2015 · Spotlight
  2. 2015
    Gibbs sampling with low-power spiking digital neuronsDas S, Pedroni B, Merolla P, Arthur JV, Cassidy A, Jackson B, Modha D, Cauwenberghs G, Kreutz-Delgado KISCAS, 2015
  3. 2013
    Cognitive computing building block: A versatile and efficient digital neuron model for neurosynaptic coresCassidy A, Merolla P, et al.IJCNN, 2013
  4. 2013
    Cognitive computing systems: Algorithms and applications for networks of neurosynaptic coresEsser S, Andreopoulos A, Appuswamy R, Datta P, Barch D, Amir A, Arthur J, Cassidy A, Flickner M, Merolla P, et al.IJCNN, 2013
  5. 2012
    A superposable silicon synapse with programmable reversal potentialBenjamin B, Arthur J, Gao P, Merolla P, Boahen KIEEE EMBC, 2012
  6. 2012
    Building block of a programmable neuromorphic substrate: A digital neurosynaptic coreArthur J, Merolla P, Akopyan F, et al.IJCNN, 2012
  7. 2012
    A digital neurosynaptic core using event-driven QDI circuitsImam N, Akopyan F, Merolla P, Arthur J, Manohar R, Modha DASYNC, 2012 · Best Paper Award
  8. 2011
    A digital neurosynaptic core using embedded crossbar memory with 45pJ per spike in 45nmMerolla P, Arthur J, Akopyan F, Imam N, Manohar R, Modha DIEEE Custom Integrated Circuits Conference, 2011
    BibTeX
    @incollection{Merolla11DigNeuroCore,
      author       = {Merolla, Paul and Arthur, John and Akopyan, Filipp and Imam, Nabil and Manohar, Rajit and Modha, Dharmendra S},
      title        = {A digital neurosynaptic core using embedded crossbar memory with 45pJ per spike in 45nm},
      booktitle    = {Custom Integrated Circuits Conference (CICC), 2011 IEEE},
      organization = {IEEE},
      year         = {2011},
      pages        = {1--4}
    }
  9. 2006
    Programmable connections in neuromorphic gridsLin J, Merolla P, Arthur J, Boahen KIEEE Midwest Symposium on Circuits and Systems, 2006
  10. 2006
    Dynamic computation in a recurrent network of heterogeneous silicon neuronsMerolla P, Boahen KISCAS, 2006
  11. 2004
    A recurrent model of orientation maps with simple and complex cellsMerolla P, Boahen KNeurIPS 16, 2004

Preprints & thesis

  1. 2016
    Deep neural networks are robust to weight binarization and other non-linear distortionsMerolla P, Appuswamy R, Arthur JV, Esser SK, Modha DSarXiv:1606.01981, 2016
    BibTeX
    @article{merolla2016arXiv,
      author  = {P.A. Merolla and R. Appuswamy and J.V. Arthur and S.K. Esser and D.S. Modha},
      title   = {Deep neural networks are robust to weight binarization and other non-linear distortions},
      journal = {arXiv:1606.01981},
      year    = {2016},
      month   = {June}
    }
  2. 2010
    The thermodynamic temperature of a rhythmic spiking networkMerolla P, Ursell T, Arthur JVarXiv:1009.5473, 2010
    BibTeX
    @article{merolla2010thermodynamic,
      author  = {Merolla, Paul and Ursell, Tristan and Arthur, John},
      title   = {The thermodynamic temperature of a rhythmic spiking network},
      journal = {arXiv preprint arXiv:1009.5473},
      month   = {September},
      year    = {2010}
    }
  3. 2006
    A silicon model of the primary visual cortex: Representing features through stochastic variationsMerolla PDoctoral dissertation, University of Pennsylvania, 2006