My passion is to build more intelligent computers, drawing on neuroscience, chip design, and machine learning.
I co-founded MK1 in 2023 focusing on AI inference. Our products grew to serve over a trillion tokens a day, and in 2025 MK1 was acquired by AMD, where our team now works in the Artificial Intelligence Group.
Before that, I was on the founding team at Neuralink, where I co-led chip design and developed the algorithms that decode brain activity. Earlier in my career, I designed brain-inspired chips at IBM and Stanford.
I'm excited to announce MK1 is joining AMD. At AMD, we'll have the resources and platform to reach the scale we always envisioned. I'm deeply grateful to our backers, our customers, and especially the MK1 team, whose talent and execution made this possible.
After years of building chips and decoding brains, I'm turning to a new problem: making LLM inference as efficient as possible within the bounds of physics. The vision of my new venture, MK1, is to make intelligence abundant by driving down the cost of serving tokens.
After five and a half years, I decided to leave Neuralink to pursue another project. It was a difficult decision: I still find Neuralink's mission extremely compelling, and I was having a lot of fun developing algorithms to decode brain activity. What I'll miss most is working with the incredibly talented and passionate team. I look forward to seeing our work improve the lives of patients who suffer from brain injury.
Our PNAS paper asks how deep learning can work within the constraints of low-power neural hardware. We describe a modified backpropagation that reaches near state-of-the-art accuracy with discrete synapses, limited-precision communication, and restricted connectivity, running live on TrueNorth across eight datasets at 1,200–2,600 frames per second while using only 25–275 mW.
TrueNorth's architecture is inspired by the structure and function of the brain: a 64×64 array of neurosynaptic cores, each combining neurons (computation), synapses (memory), and a spike router (communication). With 5.4 billion transistors, it has one million neurons and 256 million synapses, runs in real time, and consumes less than 100 mW. I was one of the lead chip architects.
Read the Science article or the pre-print (PDF).
Neurogrid is an analog neuromorphic supercomputer made of sixteen Neurocore chips (pictured) connected in a tree. I co-led the design with John Arthur, Rodrigo Alvarez, and Kwabena Boahen.
High-speed inference and enterprise AI on AMD Instinct GPUs.
Built the Flywheel inference engine (over a trillion tokens a day) and the Comprehension Engine, a reasoning and memory layer for LLMs. Acquired by AMD.
High-bandwidth brain–machine interfaces; algorithms for decoding brain activity.
Lead chip architect on TrueNorth, part of the DARPA SyNAPSE program.
Co-led design of Neurogrid, a sixteen-chip system emulating one million neurons in real time.
Full list on Google Scholar.
@article{merolla2014Science,
author = {P.A. Merolla and J.V. Arthur and R. Alvarez-Icaza and A.S. Cassidy and J. Sawada and F. Akopyan and B.L. Jackson and N. Imam and C. Guo and Y. Nakamura and B. Brezzo and I. Vo and S.K. Esser and R. Appuswamy and B. Taba and A. Amir and M.D. Flickner and W.P. Risk and R. Manohar and D.S. Modha},
title = {A million spiking-neuron integrated circuit with a scalable communication network and interface},
journal = {Science},
year = {2014},
month = {August}
}@article{benjamin2014neurogrid,
author = {Benjamin, Ben Varkey and Gao, Peiran and McQuinn, Emmett and Choudhary, Swadesh and Chandrasekaran, Anand and Bussat, Jean-Marie and Alvarez-Icaza, Rodrigo and Arthur, John and Merolla, Paul and Boahen, Kwabena},
title = {Neurogrid: A mixed-analog-digital multichip system for large-scale neural simulations},
journal = {Proceedings of the IEEE},
organization = {IEEE},
year = {2014},
volume = {102},
number = {5},
pages = {699--716}
}@article{Merolla14TreeRouter,
author = {Merolla, Paul and Arthur, John and Alvarez, Rodrigo and Bussat, Jean-Marie and Boahen, Kwabena},
title = {A Multicast Tree Router for Multichip Neuromorphic Systems},
journal = {Circuits and Systems I: Regular Papers, IEEE Transactions on},
organization = {IEEE},
year = {2014},
month = {March},
volume = {61},
number = {3},
pages = {820--833}
}@incollection{Merolla11DigNeuroCore,
author = {Merolla, Paul and Arthur, John and Akopyan, Filipp and Imam, Nabil and Manohar, Rajit and Modha, Dharmendra S},
title = {A digital neurosynaptic core using embedded crossbar memory with 45pJ per spike in 45nm},
booktitle = {Custom Integrated Circuits Conference (CICC), 2011 IEEE},
organization = {IEEE},
year = {2011},
pages = {1--4}
}@article{merolla2016arXiv,
author = {P.A. Merolla and R. Appuswamy and J.V. Arthur and S.K. Esser and D.S. Modha},
title = {Deep neural networks are robust to weight binarization and other non-linear distortions},
journal = {arXiv:1606.01981},
year = {2016},
month = {June}
}@article{merolla2010thermodynamic,
author = {Merolla, Paul and Ursell, Tristan and Arthur, John},
title = {The thermodynamic temperature of a rhythmic spiking network},
journal = {arXiv preprint arXiv:1009.5473},
month = {September},
year = {2010}
}